100% coverage cannot guarantee bug-free silicon as verification expands beyond functionality: Executives

As SoCs become more complex and move into a wider range of applications, traditional functional coverage is no longer enough to establish confidence in silicon, semiconductor engineering leaders said at the ETElectronicsWorld Design & Verification Summit 2026.

During a panel discussion on “Managing Design Complexity: The Evolving Role of Verification”, moderated by Sundeep Gupta, executive committee member, India Electronics and Semiconductor Association (IESA), speakers argued that verification is becoming a continuous, system-level activity spanning architecture, RTL, formal methods, emulation, software, power, performance and post-silicon validation.