Cadence has partnered with the Indian Institute of Technology Delhi (IIT Delhi) to establish an artificial intelligence (AI)-equipped Centre of Excellence (CoE) for semiconductor sector professionals. <\/p>\n
The CoE will provide AI-enabled electronic design automation (EDA) tools and workflows to help drive research, strengthen workforce development, and support pre-seed startups with a streamlined path to first silicon, aligning with the India Semiconductor Mission (ISM) and the Design-Linked Incentive (DLI) scheme, according to a joint statement released on Thursday. <\/p>\n
Providing proven access to more than 200 industry-grade Cadence solutions across four domains \u2013 chip design verification, digital implementation, analog design and system design and analysis \u2013 the lab will ensure that students, researchers and educators learn on the exact tools used in professional environments. <\/p>\n
By embedding \u201cdesign with AI\u201d across these workflows, the lab aims to improve engineering productivity and strengthen the integration of AI in VLSI design. <\/p>\n
Furthermore, IIT Delhi has adopted Cadence-developed courses that combine theory with comprehensive, project-based labs and assessments. <\/p>\n
To catalyse research and early-career exploration, the lab is introducing an Early Master\u2019s Research pathway for select fourth-year undergraduates from IITs and NITs, mentored by Cadence experts and IIT Delhi faculty across multiple research areas. <\/p>\n
\u201cStudents at IIT Delhi now use the same AI-enabled tools they\u2019ll see on day one in industry, closing the gap from classroom to tapeout,\u201d said Alok Jain, corporate vice president & India managing director, Cadence. \u201cPairing industry-grade technology with project-based curricula, real-world challenges and targeted startup support strengthens research relevance and workforce readiness for India\u2019s semiconductor future.\u201d <\/p>\n
\u201cThe IIT Delhi\u2013Cadence Innovation Lab combines top-tier academic rigour with cutting-edge industry tools,\u201d said Jayadeva, professor in-charge, Cadence-IIT Delhi Innovation Lab. \u201cThis partnership will expand research output, prepare students for high-impact careers and help founders move from ideas to prototypes, supporting the goals of the India Semiconductor Mission and the DLI scheme.\u201d<\/p>\n","protected":false},"excerpt":{"rendered":"
Cadence has partnered with the Indian Institute of Technology Delhi (IIT Delhi) to establish an artificial intelligence (AI)-equipped Centre of Excellence (CoE) for semiconductor sector professionals. The CoE will provide AI-enabled electronic design automation (EDA) tools and workflows to help drive research, strengthen workforce development, and support pre-seed startups with a streamlined path to first silicon, aligning with the India Semiconductor Mission (ISM) and the Design-Linked Incentive (DLI) scheme, according to a joint statement released on Thursday. Providing proven access to more than 200 industry-grade Cadence solutions across four domains \u2013 chip design verification, digital implementation, analog design and system […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[7],"tags":[],"class_list":["post-1012562","post","type-post","status-publish","format-standard","hentry","category-it-2"],"acf":[],"_links":{"self":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts\/1012562","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/comments?post=1012562"}],"version-history":[{"count":1,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts\/1012562\/revisions"}],"predecessor-version":[{"id":1012574,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts\/1012562\/revisions\/1012574"}],"wp:attachment":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/media?parent=1012562"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/categories?post=1012562"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/tags?post=1012562"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}