{"id":1011743,"date":"2026-06-02T17:38:40","date_gmt":"2026-06-02T12:08:40","guid":{"rendered":"https:\/\/telecomlive.in\/web\/?p=1011743"},"modified":"2026-06-03T07:40:17","modified_gmt":"2026-06-03T02:10:17","slug":"cadence-launches-agentic-ai-solution-to-boost-design-validation-of-complex-chips","status":"publish","type":"post","link":"https:\/\/telecomlive.in\/web\/2026\/06\/02\/cadence-launches-agentic-ai-solution-to-boost-design-validation-of-complex-chips\/","title":{"rendered":"Cadence launches agentic AI solution to boost design, validation of complex chips"},"content":{"rendered":"<p>Cadence on Tuesday launched the \u201cChipStack AI Super Agent\u201d, an autonomous virtual agentic AI design solution, with Level-5 autonomy to speed-up the timelines for designing and validating complex chips. <\/p>\n<p>The solution is built on Cadence\u2019s AI-driven electronic design automation (EDA) portfolio with Nvidia Nemotron models, and secured by Nvidia OpenShell runtime. <\/p>\n<p>The companies said in a joint statement that 1,000s of Nvidia engineers are using \u201cbillions of compute hours per year to run millions of tests to verify their designs\u201d. <\/p>\n<p>Each engineer will use ChipStack agents to run hundreds of dynamic simulations with Cadence Xcelium Logic Simulation and Jasper Formal Verification, delivering over 40x faster RTL validation cycles and &#8220;reducing a typical five-week verification loop to less than a day, dramatically accelerating the validation of complex semiconductor designs&#8221;, according to the statement. <\/p>\n<p>\u201cWe see our customers using AI to let their expert engineers take on more ambitious silicon designs with greater speed and confidence,\u201d said Paul Cunningham, senior vice president % general manager (system verification group) at Cadence. <\/p>\n<p>Cunningham added that with the ChipStack AI Super Agent, Cadence is moving from AI that assists engineers to autonomous virtual engineers that can implement real design and verification work, supported by signoff accuracies and secure, governed environments.  <\/p>\n<p>\u201cBy securing Cadence&#8217;s ChipStack AI Super Agent with NVIDIA OpenShell and powering it with Nemotron models, Cadence is bringing governed autonomy to chip design workflows \u2014 giving customers a faster, more secure path to develop and validate advanced semiconductors,\u201d said Timothy Costa, vice president &#038; general manager (computational engineering) at Nvidia.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Cadence on Tuesday launched the \u201cChipStack AI Super Agent\u201d, an autonomous virtual agentic AI design solution, with Level-5 autonomy to speed-up the timelines for designing and validating complex chips. The solution is built on Cadence\u2019s AI-driven electronic design automation (EDA) portfolio with Nvidia Nemotron models, and secured by Nvidia OpenShell runtime. The companies said in a joint statement that 1,000s of Nvidia engineers are using \u201cbillions of compute hours per year to run millions of tests to verify their designs\u201d. Each engineer will use ChipStack agents to run hundreds of dynamic simulations with Cadence Xcelium Logic Simulation and Jasper Formal [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[7],"tags":[],"class_list":["post-1011743","post","type-post","status-publish","format-standard","hentry","category-it-2"],"acf":[],"_links":{"self":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts\/1011743","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/comments?post=1011743"}],"version-history":[{"count":1,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts\/1011743\/revisions"}],"predecessor-version":[{"id":1011755,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/posts\/1011743\/revisions\/1011755"}],"wp:attachment":[{"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/media?parent=1011743"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/categories?post=1011743"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/telecomlive.in\/web\/wp-json\/wp\/v2\/tags?post=1011743"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}